Exploration of Level Shifter Architecture in Deep-Submicron Region

Abstract

These day’s IC designs are made up of multiple blocks and each block may operate at different voltages to save power. To communicate from one block to another we need voltage level shifters. In this paper, different level shifters are presented to find out a better approach for improved performance in terms of delay and voltage swing of the level shifters. The digital voltage level shifters for converting low swing input voltage to high swing output voltage and vice versa are discussed. The different topologies of level shifter circuits are designed using Finfet technology. Merits and demerits of different level shifters are discussed as they evolve from previous structures. In (SoC) Design, different parts like digital, analog, and passive components are fabricated on a single chip and need different voltages to obtain optimum performance. A level shifter cell is used to move a signal voltage to reach from one voltage domain to another in the VLSI system. This work uses different architectures to reduce the leakage, and power and improve the voltage swing. The level shifter is used to handle multiple power supplies in the same system. This is required when the chips are working towards different voltage systems and have been used between the core circuits and input/output circuits.