Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/11934
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dc.contributor.authorShah, Ruchi Vinaykumar-
dc.date.accessioned2023-08-21T09:00:36Z-
dc.date.available2023-08-21T09:00:36Z-
dc.date.issued2023-06-01-
dc.identifier.urihttp://10.1.7.192:80/jspui/handle/123456789/11934-
dc.description.abstractVoltage regulator circuits are the backbone of modern embedded electronic products. Typically, these devices need a supply voltage of 5V or 3V DC depending on the application. This project discusses the design, verification, and layout of LDO, which is used for buck regulators PMIC. Owing to the rise in power requirements for electronic devices used in servers, automation, and consumer electronics; there is a need for high-efficiency buck converters that support a wide range of input voltage operations. To enable the switching of buck drivers and give a good supply for the control logic and analog circuitry of buck regulators, proper LDO design is also required. As our PMIC is used for server applications, one of the key requirements for the LDO is to support a wide input voltage operating range like 2.95V to 6V. The second requirement is to support a regulator with a very low dropout as the Vin starts from 2.95V and the Vout is 2.75V, leaving only 250 mV of headroom. The third requirement is to support a high operating current and to have a high current limit for buck-switching applications in order of 150mA to 200mA. This project focuses on developing an LDO which meets the specifications listed above for our PMIC. Various circuit performances like DC behaviors, transient, Stability, and PSRR will perform. The layout will design; optimizing for the area, and noise and keeping latch-up constraints in mind.en_US
dc.publisherInstitute of Technologyen_US
dc.relation.ispartofseries21MECV17;-
dc.subjectEC 2021en_US
dc.subjectProject Report 2021en_US
dc.subjectEC Project Reporten_US
dc.subjectEC (VLSI)en_US
dc.subjectVLSIen_US
dc.subjectVLSI 2021en_US
dc.subject21MECen_US
dc.subject21MECVen_US
dc.subject21MECV17en_US
dc.titleWide Range LDO (Low DropOut) Design for DCDC Converteren_US
dc.typeDissertationen_US
Appears in Collections:Dissertation, EC (VLSI)

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