AXI3 Protocol VIP Development

Abstract

AXI Protocol is a part of ARM Advanced Microcontroller bus architecture (AMBA) Family. Verification of IP very complex due to System on Chip allows the integration of different Intellectual Properties. Advanced eXtensible Interface (AXI) protocol provides high bandwidth, low latency, and can able to operate at high frequencies. And comparing with other AXI provides better efficiency as compare to other AMBA protocols.

Verification of SoC take more time to verify because it is on chip, so developing a reusable Verification IP that allows to reuse this verification environment to verify other SoCs also. The meaning of reusable VIP time taken to verify the SoCs will be greatly reduced. To creating a Verification IP for the AMBA AXI3 (Advanced eXtendsible Interface) protocol by using Universal Verification Methodology (UVM). Here RTL of Master or slave of AXI are not Present here one agent of test bench are work as AXI Master Agent and Second Agent work as AXI Slave of AXI here Required any RTL so Also this concept know as Back-to-Back VIP Development.

AXI3 Protocol Support five independent channels for write, Read or responds channels. In AXI Multiple outstanding transaction and out of order transaction are also cover in verification test plane of axi. Implement test cases scenarios to achieve high functional coverage of axi testbench, ensuring that the AXI VIP effectively exercises the different features and corner cases of the AXI protocol.