Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/1245
Full metadata record
DC FieldValueLanguage
dc.contributor.authorTekwani, P. N.-
dc.contributor.authorKanchan, R. S.-
dc.contributor.authorBaiju, M. R.-
dc.contributor.authorGopakumar, K.-
dc.date.accessioned2009-11-04T09:47:04Z-
dc.date.available2009-11-04T09:47:04Z-
dc.date.issued2005-
dc.identifier.issn0939-8368-
dc.identifier.urihttp://hdl.handle.net/123456789/1245-
dc.descriptionEuropean Power Electronics and Drives Association Journal, 15 (3) August 2005; Page No. 49-59en
dc.description.abstractA four-level inverter configuration for an induction motor is proposed in this paper. The drive used for this scheme is an open-end winding induction motor which can be obtained by separating the neutral connections of any general threephase induction motor. The proposed scheme uses two three-level inverters, with asymmetric DC link voltage, feeding the induction machine from both sides and can generate voltage space vector locations similar to a conventional seven-level inverter. The four-level scheme is based on the use of only those space vector combinations of the seven-level inverter, which generate zero common mode voltage in the machine phase voltages. The proposed four-level inverter scheme requires only two isolated DC links as compared to the conventional diode-clamped four-level inverter scheme, which needs three isolated power supplies. The common mode voltage, in the pole voltages of the proposed four-level inverter, is significantly lower than that of the conventional four-level inverter while the machine phase voltages have zero common mode content. The proposed power circuit bus structure is simple to fabricate when compared to the conventional four-level inverter. A SVPWM scheme is presented, which generates the inverter gate switching signals from sampled amplitudes of reference phase voltages. The proposed four-level inverter scheme is implemented of a 1.5 kW open-end winding induction motor and the experimental results are presented.en
dc.language.isoen_USen
dc.subjectCommon Mode Voltagesen
dc.subjectMulti-Level Inverters and PWM Techniquesen
dc.subjectElectrical Faculty Paper-
dc.subjectFaculty Paper-
dc.subjectITFEE003-
dc.titleA Four-level Inverter Scheme with Reduced Common Mode Voltage for an Induction Motor Driveen
dc.typeFaculty Papersen
Appears in Collections:Faculty Papers, EE

Files in This Item:
File Description SizeFormat 
ITFEE003-3.pdfITFEE003-3677.88 kBAdobe PDFThumbnail
View/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.