IR @ Nirma University
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http://10.1.7.192:80/jspui/handle/123456789/136| Title: | Study and Design of NVM Standard Cell Library |
| Authors: | Thakkar, Rakesh A. |
| Keywords: | EC 2005 EC Project Report Project Report 2005 Project Report 05MEC016 05MEC VLSI VLSI 2005 |
| Issue Date: | 1-Jun-2007 |
| Publisher: | Institute of Technology |
| Series/Report no.: | 05MEC016 |
| Abstract: | The goal of this project is to develop a library of cells for 0.35u ST process. The library developed is a general purpose low power library that can be put into any desired requirement for Digital Applications such as Smart Cards IC’s, automotive. The design methodology involves designing layouts from given schematics with specified width and length parameters. The key stress in designing the cells lies in minimizing the area occupied by each cell as the need of the designs is to maximize the number of transistors on the same area. The cells designed in the library included NAND INVERTERS HALF ADDER FULL ADDER BUFFERS NOR AOI MULTIPLEXERS COMBINATIONAL CIRCUITS |
| URI: | http://hdl.handle.net/123456789/136 |
| Appears in Collections: | Dissertation, EC (VLSI) |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 05MEC016.pdf | 05MEC016 | 1.1 MB | Adobe PDF |  View/Open |
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