Development Study of Low Power High Speed Pipeline ADC in Deep Sub-micron Technology

Abstract

Due to high noise immunity and robustness, nearly all modern electronics areprimarily digitally operated, allowing for advanced Digital Signal Processing (DSP).But the real world signal is analog such as speech signal. The Analog-to-DigitalConverter (ADC) is the main link between the analog input and DSP part. Howeverfor applications like hand-held or wireless devices, ADC should be featured with lowpower and high speed.Among various ADC architectures, the ash ADC has highest sampling rate butit is unable to meet the power and area constraints. In two-step ash, to reducethe power consumption and area, conversion is done serially which are termed ascoarse and ne conversion. For further improvement, one can reduce the resolutionper stage and use more stages to get the full resolution. This leads to the pipelineADC. The pipeline ADC architecture is best suited for medium resolution, low powerand high speed applications. For design point of it is very exible for power and areaconstraints.Main building-blocks in each stage of the pipeline ADC are sample and hold,sub-ADC, sub-DAC and amplier. First few implementations for each sub-block arereviewed. Then by selecting appropriate blocks 8-bit pipeline ADC with samplingfrequency 10 MHz is designed using CMOS TSMC 0.35 m technology. This designhas 1-bit stage resolution and it is based on MDAC architecture which combinesamplier, DAC as well as sample and hold of next stage in one block. This reducesthe power and area drastically. Simulation result of each block as well as each stage ispresented. Power dissipation of the implemented ADC is found less than 70mW. Theimplemented pipeline ADC is simulated by Mentor Graphics tool Eldo spice and thelayout is prepared in IC station tool. Then by modifying this design, eect of stageresolution and eect of other amplier topology on power is observed. The analysisis very useful to decide the stage resolution. This power analysis is supported bysuitable simulation results.