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DC Field | Value | Language |
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dc.contributor.author | Patel, Nileshkumar Kantilal | - |
dc.date.accessioned | 2010-06-12T04:51:31Z | - |
dc.date.available | 2010-06-12T04:51:31Z | - |
dc.date.issued | 2010-06-01 | - |
dc.identifier.uri | http://hdl.handle.net/123456789/1554 | - |
dc.description.abstract | In last few decades, the demand of portable devices such as laptop, palmtop and cell phones is increased drastically. These devices use low supply voltages using single cell battery. Research in analog integrated circuits has recently gone in the direction of low voltage (LV) low-power (LP) design especially in the environment of portable systems. These LV circuits have to show also a reduced power consumption to maintain a longer battery lifetime. In this area traditional voltage-mode techniques are going to be substituted by the current-mode approach which has the advantage to overcome the gain-bandwidth product limitation typical of operational ampliers. Then they do not require high voltage gains and have good performance in terms of speed bandwidth and accuracy. Inside the current-mode architectures the current- conveyor (CCII) can be considered the basic circuit block because all the active devices can be made of a suitable connection of one or two CCIIs. CCII is particularly attractive in portable systems where LV LP constraints have to be taken into account. In fact it suers less from the limitation of low current utilization while showing full dynamic characteristics at reduced supplies (especially CMOS version) and good high frequency performance. Recent advances in integrated circuit technology have also highlighted the usefulness of CCII solutions in a large number of signal processing applications. This project describes dierent topologies of CCIIs. All topologies have been simulated in dierent CMOS process technologies using Eldo Spice tool and layout is made using Mentor Graphics Back End tools like IC Station and DA-IC. Dierent characteristics such as gain, bandwidth, terminal impedances, slew rate, dynamic range, input-output current characteristic and oset are measured and tabulated for all the CCII topologies. | en |
dc.language.iso | en_US | en |
dc.publisher | Institute of Technology | en |
dc.relation.ispartofseries | 08MEC012 | en |
dc.subject | EC 2008 | en |
dc.subject | Project Report 2008 | en |
dc.subject | EC Project Report | en |
dc.subject | Project Report | en |
dc.subject | EC (VLSI) | en |
dc.subject | VLSI | en |
dc.subject | 08MEC | en |
dc.subject | 08MEC012 | en |
dc.subject | VLSI | - |
dc.subject | VLSI 2008 | - |
dc.title | Characterization and Simulation of Second Generation Current Conveyors | en |
dc.type | Dissertation | en |
Appears in Collections: | Dissertation, EC (VLSI) |
Files in This Item:
File | Description | Size | Format | |
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08MEC012.pdf | 08MEC012 | 5.75 MB | Adobe PDF | ![]() View/Open |
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