Multilevel Inverter

Abstract

For high power applications, voltages and currents must be pushed up. Hence, maximum ratings of power semiconductors become a real handicap. Multilevel Inverter can overcome this limitation.

The report covers and gives an idea of different topologies available in Multilevel Inverters. Main two modulation topologies - Sinusoidal PWM and Space Vector PWM, used in Multilevel Inverter are also explained in this report.

To get the deep-through to Three-Level Diode-Clamped Inverter topology, firstly the Sinusoidal PWM topology is explained. The SPWM topology clearly explains the switching used in Three-Level Diode-clamped Inverter and its basics.

This report also provides one with a new and simple algorithm for Space-Vector PWM. This algorithm takes the advantage of symmetry in the space-vector diagram in order to reduce the switching losses of the IGBT’s. The biggest problem of diode clamped inverter of neutral point voltage unbalanced is overcome by the use of the effective space-vector algorithm. Simulation results are provided to validate the effectiveness of the algorithm, for different reference speeds.

The H-Bridge Inverter topology is also studied in deep and the simulation results for Nine-Level Inverter are also provided. The simulation result comparison shows that the H-Bridge Inverter is quit simple and advantageous in comparison with Diode- Clamped Inverter topology, because of simple switching techniques and improved quality of the output voltage and current and improved source current. The THD of the source current is 5-6% and output phase voltage THD is 8-9%. Other advantage of H-Bridge Inverter is easy commercialization and easy to increase the number of CELLS and hence voltage levels.

The simulation results are supported with the experimental results. For preparing the prototype, different PCB’s are prepared. The gate pulses are generated by the use of DSP ‘TMS320F2811’, which are then further given to the IGBT driver board via multilevel interface board.

A single-phase 3-level prototype model for CELL is also prepared. The experimental results are also shown.