Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/2088
Title: Investigations on Space Phasor based Hysteresis Current Controllers and Common-mode Voltage Elimination Scheme with dc-link Capacitor Voltage Balancing for Multi-level Inverter Fed Induction Motor Drives
Authors: Tekwani, P. N.
Keywords: Common-mode Voltage Elimination
Current Error Space Phasor based Hysteresis Controller
dc-link Capacitor Voltage Balancing
Induction Motor Drive
Multi-level Inverter
Electrical Faculty Paper
Faculty Paper
ITFEE003
Issue Date: Apr-2009
Series/Report no.: ITFEE003-32
Abstract: This paper focuses on the various control schemes for multi-level voltage source inverter (VSI) fed induction motor (IM) drive systems. The hysteresis current controller presented for three-level inverter is aimed to achieve a current-control strategy with optimum switching for the multi-level inverter. Whereas, the hysteresis current controller proposed for a two-level inverter, focuses on the control of switching frequency variation. A five-level inverter topology offering simple power-bus structure and reduced diode count is also proposed in this paper. This paper also presents a common-mode voltage (CMV) elimination scheme for a dual five-level inverter fed open-end winding IM drive. This paper presents the studies on the capacitor voltage balancing for multi-level inverter fed IM drives, and reports the practical limitations to achieve the same. Open-loop and close-loop control schemes for the simultaneous achievement of capacitor voltage balancing and CMV elimination in a dual five-level inverter fed open-end winding IM drive are also proposed. All the proposed schemes are first simulated and then experimentally verified using digital signal processor controlled IM drives.
Description: Annals of the Indian National Academy of Engineering (INAE), New Delhi, Vol. VI, April, 2009, Page No. 143-151
URI: http://hdl.handle.net/123456789/2088
Appears in Collections:Faculty Papers, EE

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