Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/2375
Title: Designing Generic Framework for IP Verification
Authors: Sahu, Akruti Ashokbhai
Keywords: EC 2009
Project Report 2009
EC Project Report
Project Report
09MEC
09MEC002
VLSI
VLSI 2009
EC (VLSI)
Issue Date: 1-Jun-2011
Publisher: Institute of Technology
Series/Report no.: 09MEC002
Abstract: The rapid and dynamic information and knowledge transfer between designers dur- ing the conceptual phase of designing veri cation environment for any Reusable IP can result in time consuming and erroneous environment. This thesis describes the development and veri cation of a structured framework, which has been generated to aid and support conceptual design. The development of framework for IP veri cation is based on OVM (Open Veri cation Methodology). For designing veri cation envi- ronment in this directory case study of various project was carried out and summary of study observed was drawn in table II. From that conceptual design of framework is generated, which was followed by creation of hardcoded fragments for each com- ponent. In this project work, a tool is developed for generating the Framework. Script takes input from User, in GUI form and depending on the input, existence of reuse layer in veri cation environment and placement of components is decided at run time. Existence of reuse layer control some hierarchical references in the code, and then connection of various component in respective hierarchy was otherwise a tedious task is completed through the script with less e orts. Various other com- ponents were designed like bus interface tracker, which is useful for debugging and performance analysis. Quality has been tested by ensuring the framework is compile clean. Various con guration les were developed for compiling the framework with a generic frontend simulation environment. This framework will save e orts as well as time for creating basic essential components in the environment and is less prone to errors as the framework itself would be pre-validated. This framework, as the name suggests is the fundamental layer created for any generic IP validation and thus not only enforces the same look-n-feel across all IP environments but also ensures the quality discipline among the team members.
URI: http://hdl.handle.net/123456789/2375
Appears in Collections:Dissertation, EC (VLSI)

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