Design And Integration of EMISS SoC Using 65nm Technology

Abstract

Nowadays the circuits, with the feature of lower power, lower cost per gate area, faster operation, more reliable implementation, smaller physical size, greater design security are the main requirements. SoC are the best alternative in this scenario which satisfy all these criteria. SoC is the well developed branch of electronics and in todays era everything is built on SoC(silicon on chip). SoCs are highly e cient and have improved performance because they are programmable and we can implement desired functionality and makes our task easier. SoC contains many IP(Intellectual Property) blocks which contains many modules of required property. The di erent memory modules are use in project. In past , television antennas are used to transfer data. In that, Analog signals are transferred. In this process we cant get the good picture quality due to weakness of analog signals. Di erent memories are added in the design like NAND ash memory, NOR ash memory, SPI ash memory, and MCC cache memory and also connected ST Bus. These memories are designed as a EMISS SoC. This design is veri ed using di erent tools. During veri cation di erent design bugs are arrived and using the trial and solution method these bugs are removed. Tests cases were run for read, write, hit, miss, read mode write, continuous read, continuous write to check the design using Stymgen environment. The design was being tried to be failed and was being tried to nd out as many bugs as possible.