IR @ Nirma University
Keeping in tune the global developments we are creating an institutional repository using DSpace Software (Digital Library Software). We are archiving institutional knowledge like, faculty papers, theses, and dissertations in PDF format at DSpace. Students can access this digital information anywhere in the campus.
Please use this identifier to cite or link to this item:
http://10.1.7.192:80/jspui/handle/123456789/2817| Title: | Development of Controllability Observability Aided Combinational ATPG with Fault Reduction |
| Authors: | Dhare, Vaishali Mehta, Usha |
| Keywords: | ATPG Fault Equivalence Controllability Observability EC Faculty Paper Faculty Paper ITFEC022 ITFEC010 |
| Issue Date: | 23-Jul-2010 |
| Citation: | First International Workshop on VLSI Design 2010 , Chennai, July 23-25, 2010, Page No. 682-692 |
| Series/Report no.: | ITFEC022-5 |
| Abstract: | With the Increase improvement in VLSI Design and Progressive Complication of Circuits, an efficient Technique for test pattern generation is necessary with the intention of reducing number of faults and with the use of testability measures. |
| URI: | http://10.1.7.181:1900/jspui/123456789/2817 |
| Appears in Collections: | Faculty Papers, EC |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| ITFEC022-5.pdf | ITFEC022-5 | 691.09 kB | Adobe PDF |  View/Open |
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