Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/4004
Title: Real Time Super Resolution
Authors: Patel, Usha
Keywords: Split
Split 2010
CE Split
CE Split 2010
Computer 2010
Project Report 2010
Computer Project Report
Project Report
10MCE
10MCES
10MCES05
Issue Date: 1-Jun-2013
Publisher: Institute of Technology
Series/Report no.: 10MCES05
Abstract: In most electronic imaging applications, images with high resolution are desired and often required. High resolution means that pixel density within an image is high, and therefore an HR image can offer more details that may be critical in various applications. Real time image super resolution is the ability to perform super resolution on a set of input frames at a higher rate. However as FPGA’s have grown in capacity, improved in performance and decreased in cost they have become a viable solution for performing computationally intensive task with the ability to tackle applications for custom chips and programmable DSP devices. Though this involves intensive research on the hardware implementation of super resolution algorithm. This project work is mainly based on implementing video super resolution algorithms in FPGA and come up with an effective embedded solution.
URI: http://10.1.7.181:1900/jspui/123456789/4004
Appears in Collections:Dissertation, CE

Files in This Item:
File Description SizeFormat 
10MCES05.pdf10MCES053.28 MBAdobe PDFThumbnail
View/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.