Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/4006
Title: Evaluation of High Level Synthesis
Authors: Shukla, Ami
Keywords: Split
Split 2010
CE Split
CE Split 2010
Computer 2010
Project Report 2010
Computer Project Report
Project Report
10MCE
10MCES
10MCES07
Issue Date: 1-Jun-2013
Publisher: Institute of Technology
Series/Report no.: 10MCES07
Abstract: The objective of this project is to check the level of abstraction the HLS tool provide. This is done by the implementation of a complex algorithms like Edge detection and Motion Algorithm in Altium as High Level Synthesis Tool. This project explains the implementation of edge detection algorithms like sobel, laplacian and prewitt in real time on FPGA and makes a comparative study of speedup provided by implementing them on FPGA. Motion Estimation using Exhaustive Search is implemented on FPGA using HLS and verilog Hardware Description Language.The results show that software is ine_cient in handling image processing in real time and implementing the same design in Hardware yields a speedup in the range of 26-50 times.
URI: http://10.1.7.181:1900/jspui/123456789/4006
Appears in Collections:Dissertation, CE

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