Design and Simulation of High Speed CMOS Operational

Abstract

The CMOS Operational Amplifier is the primary component of almost all the analog and mixed signal integrated systems. Its operation though, and hence design, keeps changing with every next circuit and application. And that is because of the numerous trade-offs between parameters that are needed for any given op-amp. It is always challenging to design an op-amp that approaches its ideal operation. With the continuing advances in digital communication and signal processing systems, the windows have just got narrower. Adding the case of scaling down the device sizes (which results in lower and varying mobility) increases the precision needed to design the circuit for a given specification set. A high-speed CMOS op-amp has been designed in TSMC 180nm standard CMOS process technology for applications in Analog and Mixed signal systems. It uses a simple Common Source differential amplifier in the first stage and a buffer second stage compensated with a current buffer feedback to aid high frequency operation. The op-amp exhibits a unity gain frequency of 774MHz with a dc gain of 50.42dB. The op-amp provides a slew rate of 4.7V/ns along with rail-to-rail output swing to aid for high frequency switching applications. The schematic design and simulation of the op-amp circuit has been done using Mentor Graphics’ Pyxis software.