Design of Parallel Architecture For Correlator using FPGA

Abstract

Modern high-performance digital signal processing (DSP) applications face constantly increasing performance requirements and are becoming increasingly challenging to develop and work with. In DSP paradigm, many researchers see potential in achieving algorithm speed-up by employing Field Programmable Gate Arrays (FPGAs) reconfigurable hardware with parallelism feature. However, developing applications for FPGAs incur particular challenges on the development flow. As a similarity measure, cross-correlation has found application in a broad range of signal processing. A dedicated hardware implementation of cross correlation is crucial for the requirements of real-time high-speed tasks such as automatic target matching, recognition and tracking. One efficient parallel architectures for real-time implementation of correlator using field programmable gate array (FPGA) are proposed in this project. In these architectures, several novel efficient approaches are proposed to reduce logic resource usage and computation time. These architectures can be applied in different situations according to the practical available resource of the FPGA chip used. Design ,Simulation, implementation realization of Multiple correlator in parallel architecture using embedded platform of Xilinx FPGA and Software suite. The outcomes of this work are a multi-channel correlator developed in a reconfigurable environment with new design methodology and I/O framework with software control application. The outcomes are used to demonstrate the potential of implementing DSP applications in a FPGA architecture and to discuss existing challenges and suggest possible solutions.