Analysis and Characterization of Different Comparator Topologies

Abstract

Comparator is one of the most important analog circuits required in many analog integrated circuits. It is used for the comparison between two different or same electrical signals. The design of Comparator becomes an important issue when technology is scaled down. Due to the non-linear behavior of threshold voltage (VT) when technology is scaled down, performance of Comparator is affected. Many versions of comparator are proposed to achieve desirable output in sub-micron and deep sub-micron technologies. The selection of particular topology is dependent upon the requirements and application. In this paper, we have shown the implementation of different topologies in 0.5 μm technology using the Mentor Graphics Tool. We have done the pre-layout simulation of two different topologies. We have performed DC, AC and transient analysis. We have also calculated output impedance. We have prepared a comparative analysis about them.