Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/4749
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dc.contributor.authorParashar, Ashish Kumar-
dc.date.accessioned2014-08-07T12:16:36Z-
dc.date.available2014-08-07T12:16:36Z-
dc.date.issued2014-06-01-
dc.identifier.urihttp://hdl.handle.net/123456789/4749-
dc.description.abstractThis project presents an interface circuit designed for MEMS based piezoresistive accelerometer in standard 0.35u CMOS technology. Piezoresistive accelerometer is a sensor for g-force which represents acceleration standardized in terms of g = 9.8 m/s2. To read the output an interface circuit is required which consist of various CMOS circuits i.e. ADC, sample and hold, shift register, comparator. In this project 10 – bit cyclic ADC components are designed and verified using Verilog-A. The results obtained through schematic confirm to the results obtained through verilog-A. Conclusion MEMS based Piezoresistive accelerometer has been studied. Interfacing circuit for the same requires an ADC.Verilog-A description of various components (Sample and hold, subtractar/multiplier, comparator, shift resister) was defined, simulation of which was found to be in accordance with the schematic design of these circuits.10- bit shift register designed has very fast simulation time as compare to the traditional circuit. FUTURE WORK Verilog-A description of the 10 – bit cyclic adc and comparing its result with the schematic for the same. The work would be to ensure that both the simulation results are matched.en_US
dc.publisherInstitute of Technologyen_US
dc.relation.ispartofseries12MECV03;-
dc.subjectEC 2012en_US
dc.subjectProject Reporten_US
dc.subjectProject Report 2012en_US
dc.subjectEC Project Reporten_US
dc.subjectEC (VLSI)en_US
dc.subjectVLSIen_US
dc.subjectVLSI 2012en_US
dc.subject12MECen_US
dc.subject12MECVen_US
dc.subject12MECV03en_US
dc.titleInterface Circuit Design for MEMS Based Piezoresistive Accelerometeren_US
dc.typeDissertationen_US
Appears in Collections:Dissertation, EC (VLSI)

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