Methodology for Design Verification

Abstract

The Imaging group mainly deals with two types of devices - sensors and processors. The main function of sensors is to convert the viewed scene into a data stream. The companion processor function will manage the sensor so that it can produce the best possible pictures and to process the data stream into a form which is easily handled by upstream mobile baseband or MMP (Multi-Media Processor) chipsets.

Image signal processing algorithms are developed and evaluated using Reference models before RTL implementation. After finalizing the algorithm, Reference models are used as a golden model for the IP development. The register configuration of an IP is done by the ST internal bus. Driver(component of UVC) is used to drive the signal to the IP, and the same signal is provided to the reference model. The monitor (component of UVC) senses the signal traffic going to and from the IP. The output from the IP is now obtained by the other UVC. Scoreboard compares the output of the RTL (that was captured by the UVC) with the output of python reference model. Output of RTL and Python Model can be status or/and Image. For IP/soC level verification, System Verilog UVM based Verification Environment will be used. Universal Verification Environment is the first standard, open, interoperable, and proven verification re-use methodology for System Verilog.

For easier verification of registers of DUT and to automate register related activities, The UVM REG register and memory package was released with UVM 1.1 release. The register model can be written by the user but as almost all devices have thousands of registers with few memories, witting of register model becomes tedious time consuming task and hence IPXACT tool is used for the generation of register model and almost all of the SV-UVM verification environment files. The IPXACT tool takes specification file as an input to the script and reads the register and memory information from specification file and hence generates the register model according to specification. Since IPXACT tool generates files quickly it has emerged to be an efficient way of generating verification environment files.