Please use this identifier to cite or link to this item:
http://10.1.7.192:80/jspui/handle/123456789/5234
Title: | Design Simulation And Characterisation Of Op-Amp Based 3 Bit R-2r Segmented Dacs |
Authors: | Soni, Rajanikant Amin, Gireeja Devashrayee, N. M. Mehta, Usha |
Keywords: | Digital To Analog Conversion Resolution Linearity INL DNL Glitch EC Faculty Paper Faculty Paper ITFEC006 ITFEC010 |
Issue Date: | Apr-2012 |
Series/Report no.: | ITFEC006-9; |
Abstract: | This paper presents a study on a digitally calibrated DAC, based on a strictly R-2R topology with operational amplifier which is able to derive high resolution - high performance DACs, in terms of INL and DNL. It has been proven by simulations that the performance of the conventional R-2R DAC can be optimized, regardless of resistors tolerance and the DAC resolution. |
Description: | International Journal Of Computer Applications In Engineering, Technology And Sciences (IJ-CA-ETS), Vol. 4 (2), April -September, 2012, Page No. 200 - 204 |
URI: | http://hdl.handle.net/123456789/5234 |
ISSN: | 0974-3596 |
Appears in Collections: | Faculty Papers, EC |
Files in This Item:
File | Description | Size | Format | |
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ITFEC006-9.pdf | ITFEC006-9 | 151.8 kB | Adobe PDF | ![]() View/Open |
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