Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/5884
Title: Encrypted Array Freeze Dump, Scan Dump And Register Dump – Enabling Debug for External Customers
Authors: Pabuwal, Juhi
Keywords: EC 2013
Project Report
Project Report 2013
EC Project Report
EC (ES)
Embedded Systems
Embedded Systems 2013
13MEC
13MECE
13MECE07
Issue Date: 1-Jun-2015
Publisher: Institute of Technology
Series/Report no.: 13MECE07;
Abstract: Till now Intel customers don’t have much debug visibility in microprocessor. If a customer is unable to root-cause their issue with the state extraction mechanisms at their disposal, they contact Intel teams to use the internal debug tools to extract the information they need. Running internal tools at remote customer sites slows down the customer debug throughput and puts burden on the Intel teams in terms of arranging the tool attachment and running the tool itself. So, the tool is required to do all things faster and in an efficient way. In order to achieve this, a design is made to extract data by customers which would facilitate quicker triage of fast escalating customer issues and decreases turn-around time for debugging. The encrypted array dump tool allows the customer to extract internal array and scan chain data along with the exposed registers data without having an Intel engineer involved. However, to protect IP, the data extracted by the tool will be in encrypted form and requires an Intel engineer to decrypt and evaluate it. The capability to extract the array and scanout data on their own represents an important improvement in debug throughput. The tool will extract data into a format that will be compatible with the internal debug toolset so all internal tools will be able to operate on the captured information as if it were captured using internal tools. VCU is used to extract data in encrypted form. It is a microcontroller unit which is integrated to abstracts low level details of the hardware for debugging. In addition, the abstraction layer through an interface, such as APIs, provides services, routines, and data structures to higher-level software/presentation layers, which are able to collect test data for validation and debug of a platform under test. The project is responsible for validating a Python based VLSI CAD tool towards functional verification of Intel’s cutting-edge Server Product. The hardware used for debugging are ITP and PECI. These are connected between host and platform.
URI: http://hdl.handle.net/123456789/5884
Appears in Collections:Dissertation, EC (ES)

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