Development of CAD Checks for Validation of Library Views

Abstract

Electronic gadgets that we are utilizing as a part of our everyday life are made out of several chips, which is fixed inside these gadgets for their appropriate working. This chip is a combination of different programmable programmable logic gates, memories , registers and latches.Library is an accumulation of cells and Logic gates that are fabricated onto the chip. The project is related to automation of validation of libraries which are the Intellectual Property. These libraries represent design data of cells, transistor level design and timing information, actual mask level design that will be integrated and fabricated on a chip. The automation requires plugins to validate different views of a library under test. These plugin check different views of library. The plugins are in TCL, C Shell