MIMFIF (Multi Instantiated Multiple FUB Integration Flow)

Abstract

Modern ASIC designs having ultra-deep sub-micron processes, for this type of technology node, layout had very important role to play. Full chip layout is hierarchical structure. Full chip is made up of sections, section is made up of FUBs (Functional Unit Block), FUB is made up of Standard cells. FUB Integration Flow is useful to integrate the FUB inside section. It basically load the FUB inside section, then perform hook power on it and check for the opens, DRC (Design Rule Check), Collisions, Design for manufacturability, etc... One section had many FUBs to integrate in cyclic manner. This process is time consuming, So MIMFIF is being proposed which can integrate FUB in parallel and saves the time. MIMFIF will take very less time compare to single FUB integration flow.