Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/6939
Title: Design And Validation Of Mrepair Ip In 45nm Technology
Authors: Patel, Maitri
Keywords: EC 2014
Project Report
Project Report 2014
EC Project Report
EC (VLSI)
VLSI
VLSI 2014
14MEC
14MECV
14MECV18
Issue Date: 1-Jun-2016
Publisher: Institute of Technology
Series/Report no.: 14MECV18;
Abstract: Memory has become an essential part on any chip.The number of memories required on chip depends on its application,but the amount of transistors used for information storage is larger than number of transistors used in logic operations. So to increase the yield of chip it has become necessity to increase the reliability of memory. This report represents two solutions named Memory Repair IP and and Synopsys BIST. “The basic idea of BIST, in its most simple form, is to design a circuit so that the circuit can test itself and determine whether it is ‘good’ or ‘bad’…” Apart from this purpose Synopsys BIST is having so many advantages which has been explained in this report. To store and transfer the repaired information of BIST is performed by Memory Repair IP.
URI: http://hdl.handle.net/123456789/6939
Appears in Collections:Dissertation, EC (VLSI)

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