Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/6952
Title: Electrically Aware Design Flow for Sub-micron Technologies
Authors: Joshi, Jagrut
Keywords: EC 2014
Project Report
Project Report 2014
EC Project Report
EC (VLSI)
VLSI
VLSI 2014
14MEC
14MECV
14MECV08
Issue Date: 1-Jun-2016
Publisher: Institute of Technology
Series/Report no.: 14MECV08;
Abstract: With increase in design complexity and stringent Time to Market (TTM) requirements, it is important that productivity improvement measures are taken to help designers to be in pace with the demands. At each phase of the design there are utilities which help improve the productivity by incorporating design automation and information feed forwarding. This project is aimed at enabling an electrically aware backend design ow which will try to improve the productivity of Mask Designers by feed forwarding electrical parameters early in the design ow so that the number of iterations in the backend design ow is minimized, and better turnaround time is obtained.
URI: http://hdl.handle.net/123456789/6952
Appears in Collections:Dissertation, EC (VLSI)

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