IR @ Nirma University
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http://10.1.7.192:80/jspui/handle/123456789/7335| Title: | Fault Analysis of QCA Combinational Circuit at Layout & Logic Level |
| Authors: | Dhare, Vaishali Mehta, Usha |
| Keywords: | Quantum-Dot QCA Defect HDLQ EC Faculty Paper Faculty Paper ITFEC022 ITFEC010 |
| Issue Date: | 19-Dec-2015 |
| Citation: | International WIE Conference on Electrical and Computer Engineering (WIECON - ECE), BUET, Dhaka, Bangladesh, December 19 - 20, 2015, Page No. 22 - 26 |
| Series/Report no.: | ITFEC022-10; |
| Abstract: | QCA (Quantum-dot Cellular Automata) is the most capable future nanotechnology for computing. Defects are most likely to occur in QCA devices due to the nanoscale. Faults caused by these defects must be analyzed. This paper implement the QCA combinational circuit, half adder for which fault analysis is carried out. This paper presents the fault analysis of QCA combinational circuit, half adder at layout level using QCADesigner tool and at logic level using Hardware description Language for QCA (HDLQ). |
| URI: | http://hdl.handle.net/123456789/7335 |
| ISSN: | 978-1-4673-8786-6/15 |
| Appears in Collections: | Faculty Papers, EC |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| ITFEC022-10.pdf | ITFEC022-10 | 659.17 kB | Adobe PDF |  View/Open |
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