Power Performance Analysis Of Embedded Block Coding for Optimized Truncation Of JPEG2000

Abstract

The increasing popularity of power constrained mobile computers and embeddedcomputing applications drives the need for analyzing and optimizing power in all thecomponents of a system. Recent years have witnessed a rapid growth in researchactivity targeted at reducing energy consumption in microprocessor based systems.However, this research has by and large not recognized the potential energy savingsachievable through optimization of software running on the microprocessor. Someresearch work suggested the energy ecient techniques at basic gate and architecturelevel, but not at the instruction level. Some software optimization techniques andcompiler techniques are also suggested for that.Software constitutes a major component of today's systems, and its role is pro-jected to grow even further. Thus, an ever increasing portion of the functionality oftoday's systems is in the form of instructions, as opposed to gates. This motivatesthe need for analyzing power consumption from the point of view of instructionssomething that traditional circuit and gate level power analysis tools are inadequatefor.This study describes an alternative, measurement based software level poweranalysis approach that provides an accurate and practical way of quantifying thepower cost of software for the ARM processor based architecture. For that,try toanalyze power consumption of the JPEG2000 codec.For that Simplescalar Toolset(simplesim/ARM) which gives architecture performance analysis and Sim-Panalyzerwhich gives power performance analysis are used.The main source of power and mem-ory access of JPEG2000 is EBCOT (Embedded Block Coding for Optimized Trunca-tion) part. In this study analysis of the EBCOT algorithm and its relation in termsof power consumption are presented.