Scalable and Modular Verification Environment for the Next Generation IP-Subsystems

Abstract

Design reuse and verification reuse are important to satisfy time to market requirements. Reuse of verification environment across different designs of the domain improves the verification efficiency. This work will provide the comprehensive approach to create a scalable and modular framework which addresses the key challenges faced, with very little effort across multiple aspects of verification process. Re-usability in this work is been reflected in reuse of verification components. Tools like Perl Template Toolkit were used to because of its fast performance capability. It saved our coding time, effort and coding related errors. The tool named as random test measurement was developed to increase the debugging capabilities for the real time low power requirement problems. It generated the coverage related statistics to calculate average duration of simulation, number of its occurrence(sequences) and the duration of those sequences which can predict the amount of power consumption. Complex design of IP blocks involves multiple complex scenarios such as connectivity break and multiple registers are present in the design and hence, the connectivity check has been taken care by creating an interrupt connectivity checker, and different methods to test each and every register has been performed thoroughly. Hence the verification environment in this project is made scalable and modular so to make testbench components, register sequences and tests, coverage model reusable.