Top Level CPU Verification

Abstract

In application specific integrated circuit design , verification is a vital part in the processor development. Verification ensures that the product is designed is the same as it was intended, by applying the test signals to the design and check whether its matches with the output or not. Unfortunately, many design projects do not complete thorough design qualification resulting in products that does not meet customer expectations and require costly design modifications. More the complex is design , the verification of design is also more complex and verification time is also more. Random stimulus generation or Random Instruction Sequence (RIS) is widely reCognized as an effective approach for verifying corner cases that are hard to anticipate. While most of design bugs are flushed out by the deterministic approach, RIS tools are highly effective in hitting obscure cases. The work presented here uses the RIS tool to solve the problem. The tool uses template library that contains test-cases. A test file contains registers and memory values. Random test generator never generates a test which is invalid. The work presented here can be subdivided into two parts, one is to generate template (test-case) for specific conditions like instruction optimization, early forward and cryptography. These templates are developed to increase the hit-rate of corner cases to meet required targets, which are required for verifying arm cores. It helps to improve the randomization of RIS tools. These templates hit different conditions of early forward with various instruction sets like Arch32 and Arch64, and also with different subsets of instructions like branch, logical, arithmetic and load-store. The second part is to analyze the cache and branch behaviour with some random test suits. It is very tedious and time consuming task to find out behaviour for different types of templates. So, automation is required. These automation scripts comes together to form a regression framework, which handles everything from test preparation to test submission to clusters for execution. Framework is generic which can work with almost every cores developed by arm.