Automated Flow to fix Semi-custom Layout DRC in Ultra-Deep-Submicron Technology

Abstract

Modern ASIC designs having ultra-deep sub-micron processes, for this type of technology node layout had very important role to play. Full chip layout had its own hierarchical structure. The full chip hierarchy contains Standard cell, Functional unit blocks (fub), Section. Fub Integration Flow is useful to integrate the fub inside section. It basically loads all the fub data inside section, then perform hook power on it and check for the opens, DRC violations, design for manufacturability, etc.Sections have many fub to integrate in cyclic manner and have many DRCs violation over the fubs. To clean all the DRC violations manually is time consuming process, so automated flow is being proposed which can fix DRCs and saves the time. Automated flow will fix all the DRC listed down in the violation table, which can reduce manual human efforts in cleaning DRCs.