SoC Security and Debugging through CR Management and Access

Abstract

Since the dawn of complex systems, numerous experiments have been carried out to design tools for defining Software/Hardware interfaces of such complex systems and to generate useful artifacts which are investigative procedures that will be used in different downstream levels such as from RDL to RTL , from RTL to Validation(Pre-silicon)and then from validation to testing(Post-silicon). In 2005, a tool called Blueprint was released by Denali which uses a pre-established set of data for describing registers using a format called Register Description Language (RDL).Automatic generation and synchronization of register views for specification, hardware design, software development, verification, and documentation can easily be done by developers using SystemRDL. The development of a standard format for all the data which includes all the debugging features, description of registers and hardware related constraints has been mentioned in SPIRIT. The consortium has proposed an IEEE standard called IP-XACT which is an XML Schema Definition used to store the register and memory map data as needed in our tool. This project mainly focuses on IP integration process which is more prone to errors at SoC level. Quality checks are performed to debug the RDL related errors. The integration flow is automated through Perl scripts, customized and validated to provide efficient implementation ensuring IP protection as far as SoC security is concerned.