Please use this identifier to cite or link to this item:
http://10.1.7.192:80/jspui/handle/123456789/9146
Title: | Automation Techniques to Improve Custom Layout Productivity and Process Design Kit Quality |
Authors: | Kapoor, Sejal |
Keywords: | EC 2017 Project Report Project Report 2017 EC Project Report EC (VLSI) VLSI VLSI 2017 17MEC 17MECV 17MECV08 |
Issue Date: | 1-Jun-2019 |
Publisher: | Institute of Technology |
Series/Report no.: | 17MECV08; |
Abstract: | The need to have a better productivity, improved quality comes a long way from the inception of industrialization to the current growing trends in technology and will be thought in future as well. With the increase in design complexity and stringent time to market requirements, it is important that productivity improvement measures are taken to help designers to be in pace with the demands. At each phase of a backend design, various utilities and functionalities are used to increase layout productivity and improve kit quality by incorporating automation. Custom layout functionalities include migration which is conversion of an internal database to an external industry standard database; test case creation for testing of tools, flows and technologies in by Design Quality Analysis; enabling industry standard layout editing custom place and route tools and analyzing electrical parameters. This project aims at enabling automation in these layout utilities used in a design which will try to enhance node-node and dot-dot process migration flows and support, continuously improve Quality Analysis coverage, improve productivity of mask designers by feed forwarding electrical parameters early in the flow, reducing number of iterations in backend design flow and deliver high quality custom utilities. |
URI: | http://10.1.7.192:80/jspui/handle/123456789/9146 |
Appears in Collections: | Dissertation, EC (VLSI) |
Files in This Item:
File | Description | Size | Format | |
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17MECV08.pdf | 17MECV08 | 4.72 MB | Adobe PDF | ![]() View/Open |
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