Analysis of Signatures for Observation IP and updating RTL for non-zero Signatures

Abstract

MISRs and Compressors are used for Signature analysis in built-in self-test (BIST) Mechanism of digital VLSI circuits. MISR's and Compressor are probably the most commonly used data compaction tools. Signature Analysis is done to check aliasing errors in design. Theory on errors due to aliasing and its proven criteria for the register design, however, are still missing.

This thesis explains the dependency of aliasing on MISR and Compressor used in Observation IP in SOC. Observation IP is designed to determine the presence or absence of faults in SOC at various protocol buses e.g. AMBA. It is also used in IFST,PCI and in address ring of cache .As this IP is used in various parts of SOC it is very important to minimize aliasing due to configuration else we will end up in series of failures.

The task of analysing output Signatures for aliasing based on the length and feedback network of MISR and Compressor configuration is explained in this thesis. It is observed that there are void signatures generated at the output due to non-zero input vectors. The output is not expected to be void, as we could not identify whether the MISR is resseted or input is not applied. The analysis of signatures is done using python. The various libraries of python used for aliasing study are pandas , csv , os ,random etc.

Using this analysis MISR's RTL is modified resulting in minimal aliasing of Observation IP. Compressor's RTL is also modified in such a way that no void signature can be obtained at the output.