Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/9514
Title: Uncore IP BIOS Development for Intel's Next Generation Processor
Authors: Bhati, Priyanka
Keywords: Computer 2018
Project Report 2018
Computer Project Report
Project Report
18MCE
18MCEC
18MCEC02
Issue Date: 1-Jun-2020
Publisher: Institute of Technology
Series/Report no.: 18MCEC02;
Abstract: Intel's System on chip(SoC) features a new set of Intel Uncore Intellectual Property (IP) for every generation. With this enhancement's it becomes difficult to maintain the commonality between the different project running in parallel. This project involve working on development of new features for Intel's upcoming processor, focusing on BIOS development for IPs residing on North or Uncore part of SOC. The main purpose is to create a single silicon package that supports all the upcoming platforms having different generation of IP's. There is a need to identify the commonality between current generation with next generation, so that same IP code can be plug/unplug into next generation based on the requirement. The IP based silicon support architecture allows us to reuse firmware code for IP across dies. The idea of having convergence in IP code, it will reduce efforts while enabling IP on new platform/generation. The single silicon package is intended to provide chipset initialization code for an arbitrary number of platforms at once. Debugging is an important aspect for a developer. For every phase of software life-cycle, debug tool plays an important aspect. For the Unified Extensible Firmware Interface (UEFI) development there requires a need for developing debug tool which is platform independent and which cuts the cost of time and manual validation.
URI: http://10.1.7.192:80/jspui/handle/123456789/9514
Appears in Collections:Dissertation, CE

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