Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/11934
Title: Wide Range LDO (Low DropOut) Design for DCDC Converter
Authors: Shah, Ruchi Vinaykumar
Keywords: EC 2021
Project Report 2021
EC Project Report
EC (VLSI)
VLSI
VLSI 2021
21MEC
21MECV
21MECV17
Issue Date: 1-Jun-2023
Publisher: Institute of Technology
Series/Report no.: 21MECV17;
Abstract: Voltage regulator circuits are the backbone of modern embedded electronic products. Typically, these devices need a supply voltage of 5V or 3V DC depending on the application. This project discusses the design, verification, and layout of LDO, which is used for buck regulators PMIC. Owing to the rise in power requirements for electronic devices used in servers, automation, and consumer electronics; there is a need for high-efficiency buck converters that support a wide range of input voltage operations. To enable the switching of buck drivers and give a good supply for the control logic and analog circuitry of buck regulators, proper LDO design is also required. As our PMIC is used for server applications, one of the key requirements for the LDO is to support a wide input voltage operating range like 2.95V to 6V. The second requirement is to support a regulator with a very low dropout as the Vin starts from 2.95V and the Vout is 2.75V, leaving only 250 mV of headroom. The third requirement is to support a high operating current and to have a high current limit for buck-switching applications in order of 150mA to 200mA. This project focuses on developing an LDO which meets the specifications listed above for our PMIC. Various circuit performances like DC behaviors, transient, Stability, and PSRR will perform. The layout will design; optimizing for the area, and noise and keeping latch-up constraints in mind.
URI: http://10.1.7.192:80/jspui/handle/123456789/11934
Appears in Collections:Dissertation, EC (VLSI)

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