1. DSpace at Nirma University
  2. 02. Institute of Technology
  3. Electronics and Communication Engineering Department

Dissertation, EC (VLSI) : [423] Collection home page

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Collection's Items (Sorted by Submit Date in Descending order): 361 to 380 of 423
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PreviewIssue DateTitleAuthor(s)
06MEC001.pdf.jpg1-Jun-2008Design of CMOS I/O Library Cell in 65 nm TechnologyKumar, Ankush
05MEC020.pdf.jpg1-Jun-2007Validation of Chips Containing Memories, I/Os and Standard Cells in nm Technology and Static IR Drop Analysis, Methodology for Testing and Characterization of ChipsThakur, Gunjan D.
05MEC017.pdf.jpg1-Jun-2007Design and Implementation of Digital QPSK Modulator on FPGAVelaga, Muralikrishna
05MEC009.pdf.jpg1-Jun-2007Configuration of Modular Timer System and Creating of Padring for SoCKumar, Vinod N.
05MEC008.pdf.jpg1-Jun-2007Receiver Front End for RF ApplicationMedhekar, Abhishek
05MEC002.pdf.jpg1-Jun-2007Platform Integration with Reusability Methodology in Nanometer TechnologyChopra, Bhawna
05MEC001.pdf.jpg1-Jun-2007IR Drop Analysis of SOCChemben, Dhilraj
04MEC018.pdf.jpg1-Jun-2006Design and Implementation of Distributed Arithmetic Based FIR FilterThaker, Pinakin P.
04MEC006.pdf.jpg1-Jun-2006Certification of Standard Cells Libraries for Sub-Micron VLSI CircuitsApurva, Chaure H.
04MEC002.pdf.jpg1-Jun-2006FPGA Based Signal Processing System for Ultrasnography ImagingAgarwal, Vijay
03MEC016.pdf.jpg1-Jun-2005Design of Comb Drive and Signal Conditioning Circuitry for MEMS Intertial SensorsSuresh, S.
03MEC015.pdf.jpg1-Jun-2005Design and Development of Test on Target for Node-B sub-module using VHDLSaxena, Sudhanshu
04MEC020.pdf.jpg1-Jun-2006PCI Target Interface Core Revision 2.2Valandas, Vijay Kumar
04MEC019.pdf.jpg1-Jun-2006RTL Design of USB 2.0 Transceiver MacrocellWaghela, Harish
04MEC017.pdf.jpg1-Jun-2006RTL Design of DDR2 SDRAM ControllerSaxena, Anmol Sahay
04MEC016.pdf.jpg1-Jun-2006Ethernet MAC ReceiverRajput, Amit Singh
04MEC014.pdf.jpg1-Jun-2006Design and Development of IP-Core of FET for FPGANaik, Amisha P.
04MEC011.pdf.jpg1-Jun-2006RTL Design Of DDR SDRAM ControllerKhan, Firoz
04MEC009.pdf.jpg1-Jun-2006FPGA Based Implementation Of Hearing Aid Digital FilterGoyel, Pradip Kumar
06MEC012.pdf.jpg1-Jun-2008Architecture Evaluation for Programmable Logic (90nm/65nm)Patel, Mehul I.
Collection's Items (Sorted by Submit Date in Descending order): 361 to 380 of 423
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