A Proposed Mechanism Using Parallelization Techniques in Steganography and Digital Watermarking for Multi Processor Systems

Abstract

Parallel programming techniques used in the paper are for a shared memory multiprocessor computer for performing Steganography and digital watermarking. Steganography and digital watermarking is the art of hiding information into the cover object taking care that is imperceptible with the naked eye. There are computer with many central processing units (CPUs), all of which have equal access to a common pool of main memory. Multiprocessor computers can be used for generalpurpose time sharing as well as for compute intensive applications. If the user creates only single stream applications, then a multiprocessor will not be any more or less difficult to use than a uniprocessor i.e. it will be quite sensible to run such a program on a uniprocessor (one CPU). This paper focuses on a technique through which optimization is possible for embedding and extracting the information in Steganography and digital watermarking techniques exploiting the parallelization techniques. The parallelization techniques are expected to be implemented on almost all the applications running on Laptops, PDA, Desktop and mobile phone. The demand for resource hungry applications on mobile phones is expected to grow exponentially hence the future of mobile phone is likely to be with multicore embedded processors on mobile phones too. Laptops and Desktops are already available in market having dual-core computing power. The paper draws an attention to highlight the possible parallelization in Steganography and digital watermarking techniques to get superior performance.