PDK (Process Design Kit) Backend Validation

Abstract

PDK is short for "Process Design Kit". A PDK is a complete set of technology files to enable analog and mixed signal custom IC circuit design in the Design Environment. The "Process" in PDK is the specific foundry process supported by that PDK. A fully integrated PDK includes technologies file ( LVS, DRC, Parasitic Extraction, Spice Models) device symbols, CDF, callbacks, Pcells, PV rule files etc. Everything you need to do integrated circuit design. So, these design kits do not have any particular functionality. Rather the users that are the designers of various yields will use these PDK to test their design's functionality. Hence PDK is a central part of the circuit design.

In Physical verification files, it includes runset files for Design Rule Check (DRC) and Layout vs. Schematic (LVS) checks, Design Rule Check(s) (DRC) is the area of Electronic Design Automation that determines whether the physical layout of a particular chip layout satisfies a series of recommended parameters called Design Rules. LVS performs a comparison process that verifies whether the geometric or layout implementation of a circuit matches the schematic representation.