Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/6661
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dc.contributor.authorVyas, Jayendra-
dc.date.accessioned2016-07-15T09:42:23Z-
dc.date.available2016-07-15T09:42:23Z-
dc.date.issued2016-06-01-
dc.identifier.urihttp://hdl.handle.net/123456789/6661-
dc.description.abstractThis project is about re-engineering of SLM model where SLM stands for system level memory. SLM is a memory model used internally in ST Microelectronics to sim- ulate memory in verification phase of SoC design. Existing SLM is based on experf library which is obsolete now. So, We are re-engineering SLM with re-creating classes which are independent of experf library functions. Automation of existing testcases of SLM allows developers to test code regressively. SLM GUI is also an integral part of this project which provides different views for memory instances .en_US
dc.publisherInstitute of Technologyen_US
dc.relation.ispartofseries14MCEC30;-
dc.subjectComputer 2014en_US
dc.subjectProject Report 2014en_US
dc.subjectComputer Project Reporten_US
dc.subjectProject Reporten_US
dc.subject14MCEen_US
dc.subject14MCECen_US
dc.subject14MCEC30en_US
dc.titleRe-engineering of SLM with Automated Testingen_US
dc.typeDissertationen_US
Appears in Collections:Dissertation, CE

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