IR @ Nirma University
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http://10.1.7.192:80/jspui/handle/123456789/6661| Title: | Re-engineering of SLM with Automated Testing |
| Authors: | Vyas, Jayendra |
| Keywords: | Computer 2014 Project Report 2014 Computer Project Report Project Report 14MCE 14MCEC 14MCEC30 |
| Issue Date: | 1-Jun-2016 |
| Publisher: | Institute of Technology |
| Series/Report no.: | 14MCEC30; |
| Abstract: | This project is about re-engineering of SLM model where SLM stands for system level memory. SLM is a memory model used internally in ST Microelectronics to sim- ulate memory in verification phase of SoC design. Existing SLM is based on experf library which is obsolete now. So, We are re-engineering SLM with re-creating classes which are independent of experf library functions. Automation of existing testcases of SLM allows developers to test code regressively. SLM GUI is also an integral part of this project which provides different views for memory instances . |
| URI: | http://hdl.handle.net/123456789/6661 |
| Appears in Collections: | Dissertation, CE |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 14MCEC30.pdf | 14MCEC30 | 1.05 MB | Adobe PDF |  View/Open |
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