Analysis and Design Validation of Standard Cells Library

Abstract

A standard cell library is a collection of low-level electronic logic function such as AND, OR, INVERTER, flip-flops, latches, and buffers. These cells are realized as fixed-height, variablewidth full-custom cells. The key aspect with these libraries is that they are of a fixed height, which enables them to be placed in rows, easing the process of automated digital layout. The cells are typically optimized full-custom layouts, which minimize delays and area. So Standard cells plays a vital role in the SoC. The objective of project is to design the layouts of the standard cells as per the required specifications of customer, and to check the yield we have to check the design under various real world scenarios and in order to do that we check performance of design through various PVT (Process, Voltage and Temperature)corners with an aim that the circuit should be able to reliably operate at all the extreme conditions For that Monte carlo, cross corner, High sigma analysis is done. standard cell libraries have to be deliver on time. So in less time full packed library has to be created in which every cell has to be DRC and DFM clean. Standard cell libraries offer specific cells designed for various applications, balanced cells (inverters, buffers, flip flops), metastable flip flops (for synchronizer circuits), level shifters. So all these cells are created depending upon the need of customer which requires different processes.