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DC Field | Value | Language |
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dc.contributor.author | Jadav, Venoo | - |
dc.date.accessioned | 2020-07-17T08:52:04Z | - |
dc.date.available | 2020-07-17T08:52:04Z | - |
dc.date.issued | 2019-06-01 | - |
dc.identifier.uri | http://10.1.7.192:80/jspui/handle/123456789/9123 | - |
dc.description.abstract | Multiple integrated circuits are used in designing a system to meet better power and performance demands. These devices operate at different voltages and so has different logic levels which necessitate the use of voltage level translators between them. This report gives a brief understanding of voltage level translators aimed at choosing the best device as per design requirements. In addition, the report also highlights a study on asynchronous and synchronous serial protocols which will be used as a communication medium between devices and logic translator along with a comparison between features of the serial protocols. Results show research on various level translators available in the market with respect to the design requirements of the system. | en_US |
dc.publisher | Institute of TechnologyVenoo Jadav | en_US |
dc.relation.ispartofseries | 17MECE06; | - |
dc.subject | EC 2017 | en_US |
dc.subject | Project Report | en_US |
dc.subject | Project Report 2017 | en_US |
dc.subject | EC Project Report | en_US |
dc.subject | EC (ES) | en_US |
dc.subject | Embedded Systems | en_US |
dc.subject | Embedded Systems 2017 | en_US |
dc.subject | 17MEC | en_US |
dc.subject | 17MECE | en_US |
dc.subject | 17MECE06 | en_US |
dc.title | SPI Analysis and Voltage Level Translator Selection | en_US |
dc.type | Dissertation | en_US |
Appears in Collections: | Dissertation, EC (ES) |
Files in This Item:
File | Description | Size | Format | |
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17MECE06.pdf | 17MECE06 | 871.63 kB | Adobe PDF | ![]() View/Open |
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