Please use this identifier to cite or link to this item:
http://10.1.7.192:80/jspui/handle/123456789/9123
Title: | SPI Analysis and Voltage Level Translator Selection |
Authors: | Jadav, Venoo |
Keywords: | EC 2017 Project Report Project Report 2017 EC Project Report EC (ES) Embedded Systems Embedded Systems 2017 17MEC 17MECE 17MECE06 |
Issue Date: | 1-Jun-2019 |
Publisher: | Institute of TechnologyVenoo Jadav |
Series/Report no.: | 17MECE06; |
Abstract: | Multiple integrated circuits are used in designing a system to meet better power and performance demands. These devices operate at different voltages and so has different logic levels which necessitate the use of voltage level translators between them. This report gives a brief understanding of voltage level translators aimed at choosing the best device as per design requirements. In addition, the report also highlights a study on asynchronous and synchronous serial protocols which will be used as a communication medium between devices and logic translator along with a comparison between features of the serial protocols. Results show research on various level translators available in the market with respect to the design requirements of the system. |
URI: | http://10.1.7.192:80/jspui/handle/123456789/9123 |
Appears in Collections: | Dissertation, EC (ES) |
Files in This Item:
File | Description | Size | Format | |
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17MECE06.pdf | 17MECE06 | 871.63 kB | Adobe PDF | ![]() View/Open |
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