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Browsing by Subject EC 2016

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Showing results 1 to 20 of 68  next >
PreviewIssue DateTitleAuthor(s)
16MECV21.pdf.jpg1-Jun-2018Accelerating the Speed of Integrating IPs into SoCSapovadia, Dhara Mukeshbhai
16MECV22.pdf.jpg1-Jun-2018ASIC Design and Implementation of 4 Bit DACSayani, Mahapatra
16MECE21.pdf.jpg1-Jun-2018Audio Classification using Deep Neural NetworkShah, Viral
16MECV04.pdf.jpg1-Jun-2018Automated Flow to fix Semi-custom Layout DRC in Ultra-Deep-Submicron TechnologyDave, Prachi
16MECE27.pdf.jpg1-Jun-2018Automated Pre-OS (Firmware) Build and Continuous IntegrationVyas, Chandni
16MECV14.pdf.jpg1-Jun-2018Automatic Gain Control Amplifier for Biomedical ApplicationsModi, Bhavik
16MECE11.pdf.jpg1-Jun-2018Automating Networking and USB Testing of Platform Integration for Server Based on Xeon ProcessorMer, Samarth
16MECE12.pdf.jpg1-Jun-2018Automating Security and Memory Testing of Platform Integration For Server Based on Xeon ProcessorMonani, Ravi
16MECE25.pdf.jpg1-Jun-2018Automating Stability and Power Management Testing for Server Platforms based on Xeon ProcessorUpadhyay, Varun
16MECV18.pdf.jpg1-Jun-2018Building Testchip for Enabling Faster SoC FlowRamanuj, Zeel Ghanshyambhai
16MECV11.pdf.jpg1-Jun-2018A Built-in Self-Test with Design for Testability Support for Embedded SRAMPannalal, Khatik Bhagvan
16MECE23.pdf.jpg1-Jun-2018Camera, Audio, Video UDL Development and Enablement in Pre-Silicon and Post-Silicon EnvironmentSoni, Margi
16MECC13.pdf.jpg1-Jun-2018Challenges and Techniques of Transmit Power Control in WLAN TransceiverDivekar, Paridhi D.
16MECC06.pdf.jpg1-Jun-2018CNN Based Object ClassificationJain, Minali Rani
16MECV16.pdf.jpg1-Jun-2018Comparative Analysis and Evaluation Of Different CMOS TechnologiesGodre, Ocean
16MECV20.pdf.jpg1-Jun-2018Configurable RTL Generation Using AutomationRathore, Ritu
16MECE19.pdf.jpg1-Jun-2018Continuous Integration for Hardware Emulation on SoCShah, Rimit Sanjiv
16MECC02.pdf.jpg1-May-2018Convolutional Coding in Bluetooth 5Gogdani, Vaarisha Pankaj
16MECV08.pdf.jpg1-Jun-2018Deploying and Improving Clock Domain Crossing Verification Techniques for SoCsJain, Sachin Sanjaykumar
16MECV02.pdf.jpg1-May-2018Design and Analysis of Power Efficient Dual Rail MethodologyBhatt, Kunjan Mukeshkumar
Showing results 1 to 20 of 68  next >