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Browsing by Subject VLSI 2010

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Showing results 1 to 18 of 18
PreviewIssue DateTitleAuthor(s)
10MECV02.pdf.jpg1-Jun-2012Analysis And Usage Of Formal Equivalence Check On SoCChavan, Vaibhav
10MECV11.pdf.jpg1-Jun-2012Automation of I/O ring design and logic realizationMatholia, Bhaumik
10MECV01.pdf.jpg1-Jun-2012Characterization, Design & Simulation of Low Power High Speed CMOS Comparator in Deep Sub-micron TechnologyAmin, Gireeja D.
10MECV27.pdf.jpg1-Jun-2012Characterization,Design & simulation of Digital to Analog Converter in Deep-Submicron TechnologySoni, Rajanikant M.
10MECV18.pdf.jpg1-Jun-2012Design and Development of Standard cell and eCL libraryVasa, Roopak
10MECV28.pdf.jpg1-Jun-2013Design and Simulation of High Speed CMOS OperationalPatel, Snehal Mahendrabhai
10MECV06.pdf.jpg1-Jun-2012Developing a framework for Power Management Validation on Windows 8 OSGopani, Bhavesh
10MECV29.pdf.jpg1-Jun-2012Development of Reliability Aware Intelligent Memory Manager in an SoC (SoC-RAIMM)Khanusiya, Soyeb A.
10MECV20.pdf.jpg1-Jun-2012Development of System Level Memory Model for Prabilistics Error Introduction for Reliable Aware Intelligent Memory Management in an SoCSheth, Maulin Biharilal
10MECV16.pdf.jpg1-Jun-2012Evaluation and Porting of High Speed Dual Port SRAM Compiler in Submicron TechnologyPatel, Pratik
10MECV17.pdf.jpg1-Jun-2012Evaluation of SRAM Compiler in Shrink TechnologyPatel, Sweetu
10MECV25.pdf.jpg1-Jun-2012GUI based Die Size Estimation Tool with IO Portfolio Selection SystemPatel, Ashish
10MECV23.pdf.jpg1-Jun-2012High Performance and Low Power VLSI Design for SoC ApplicationsPurani, Ashish S.
10MECV22.pdf.jpg1-Jun-2012Low Power RTL Design and RTL Quality CheckBadghare, Govil M.
10MECV09.pdf.jpg1-Jun-2012Mat09 Generation And Validation With WebLibIO FlowLakkad, Dhaval
10MECV08.pdf.jpg1-Jun-2012A Novel Approach To Power Optimization In High Frequency Microprocessor Design Using An Intelligent Slack Manipulation AlgorithmTrivedi, Kruti
10MECV26.pdf.jpg1-Jun-2012Optimization In Timing Analysis Corners In 28nmPatel, Chitrarth
10MECV24.pdf.jpg1-Jun-2012Synthesis And APR Of Data-Path Module In Sensor Hub On 32nm/22nm TechnologyBhatt, Purav K
Showing results 1 to 18 of 18