Browsing by Subject VLSI 2015

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PreviewIssue DateTitleAuthor(s)
15MECV16.pdf.jpg1-Jun-2017Analog Validation of Analog IP's Embedded in SoCPrajapati, Ashutosh
15MECV23.pdf.jpg1-Jun-2017Analysis & Design of Linear Voltage Regulator for DDR I/O applicationSantoki, Kishan
15MECV26.pdf.jpg1-Jun-2017ASIC Design of 8-bit 250MSPS Two-Step Flash ADCDoshi, Shruti
15MECV07.pdf.jpg1-Jun-2017At-Speed ATPG Aware Scan StitchingDave, Dipen
15MECV28.pdf.jpg1-Jun-2017Automation of AVR Test Benches using VAMPIRE ToolSolanki, Maharshi
15MECV12.pdf.jpg1-Jun-2017Critical Path SensorLeuva, Karishma
15MECV22.pdf.jpg1-Jun-2017Designing and Verification of IPsTrivedi, Saloni
15MECV24.pdf.jpg1-Jun-2017Efficient Physical Design Methodology & Convergence of Server SoCs PartitionsShah, Devang
15MECV13.pdf.jpg1-Jun-2017Enablement of High Voltage DRC and Fill Flow for Cadence PlatformMehta, Utsavi Bipinbhai
15MECV09.pdf.jpg1-Jun-2017FPGA Based CCD Timing GeneratorSharma, Ekta
15MECV08.pdf.jpg1-Jun-2017FPGA Implementation of Digital Beam Former for Synthetic Aperture Radar (SAR) ApplicationDohare, Parul
15MECV20.pdf.jpg1-Jun-2017Impact Of Reset Domain Crossing On PowerPro ToolModi, Ritika
15MECV10.pdf.jpg1-Jun-2017Improvisation & Deployment of Methodologies to Have Productivity Gain in Characterization and Design Verification flow of Static MemoriesJain, Anmol Sunilkumar
15MECV19.pdf.jpg1-Jun-2017Incremental Static Timing Analysis For Complex DesignAgarwal, Rakshita
15MECV11.pdf.jpg1-Jun-2017IP Verification at SoC LevelKadia, Munjal
15MECV05.pdf.jpg1-Jun-2017Logical Convergence of High Speed Design using Formal VerificationChokshi, Raj
15MECV02.pdf.jpg1-Jun-2017Methodology For Silicon Qualification Of Standard Cells: Design, Verification And Silicon DebugAgrawal, Ankita
15MECV30.pdf.jpg1-Jun-2017Mixed Signal Implementation in Advanced Node for Cadence PlatformVegad, Krutarth Shantibhai
15MECV06.pdf.jpg1-Jun-2017Optimal Methodology for Signal Integrity based Timing and Noise Analysis of IP’s and IP Interface ModelingChoudhari, Manju Ambaram
15MECV27.pdf.jpg1-Jun-2017Optimum Methodology for Synthesis, Placement & Routing of Mix Signal IP’s & It’s ImplementationShukla, Ankit