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Showing results 1 to 18 of 18

Preview	Issue Date	Title	Author(s)
	1-Jun-2021	Analysis and Optimization of the Dynamic Power for NoC IP	Patel, Sneha
	1-Jun-2021	Automated Flow to Manage Dependencies between Different Flows – Serial & Parallel Execution of Design Steps	Dadlani, Hitesh
	1-Jun-2021	Automating Scan ATPG Regression for SoC	Thobhani, Parth Kishorbhai
	1-Jun-2021	Automation on Routing optimization for VLSI Physical Design	Jain, Sarthak M.
	1-Jun-2021	Low Power Sign-Off Checks and their Efficient Engineering Change Order (ECO) Implementation	Shah, Bhasha M
	1-Jun-2021	Performance Analysis of Arm Cortex-R Series Processors	Hazra, Anisha
	1-Jun-2021	Physical Design Implementation with Low Power	Sharma, Sharma
	1-Jun-2021	Physical Design of ASIC Block in 12nm Technology	Kevat, Pooja
	1-Jun-2021	Power Reduction and Area Optimization in Physical Design Implementation of a DSP Block	Kumawat, Sangeeta Shambhubhai
	1-Jun-2021	Pre-Silicon Scan Validation and Pattern Transformation	Katarmal, Anju Maheshbhai
	1-Jun-2021	RC Delay Reduction Methods for Routing Optimization	Koshti, Dhruvil Ganeshbhai
	1-Jun-2021	SAGE ATPG Flow for Xeon Server SoC	Patel, Akashkumar
	1-Jun-2021	Scan Construction and Validation of Channel and Rectilinear Designs	Dhama, Ankit
	1-Jun-2021	SoC Front-End Integration Flow.	Vaghela, Parthkumar Rajendrabhai
	1-Jun-2021	SoC Quality Checker Tool for Pre-Silicon Verification	Srivastav, Shubham
	1-Jun-2021	Static Timing Analysis of a block for better Power, Performance and Area.	Biji, Rhea
	1-Jun-2021	Study and Analysis of Library Validation and Flow Methodology	Nagaria, Bandhan
	1-Jun-2021	Synthesis and STA Design of Synopsys Foundation IPs	Yadav, Ankit Kumar

Showing results 1 to 18 of 18