1. DSpace at Nirma University
  2. 02. Institute of Technology
  3. Electronics and Communication Engineering Department

Dissertation, EC (VLSI) : [423] Collection home page

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Collection's Items (Sorted by Submit Date in Descending order): 321 to 340 of 423
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PreviewIssue DateTitleAuthor(s)
08MEC020.pdf.jpg1-Jun-2010Implementation of Error detecting and Error correcting AlgorithmMalek, Mohammedzuber
08MEC019.pdf.jpg1-Jun-2010FPGA Veri cation and Performance Enhancement and ImprovementUpadhyay, Sarang H.
08MEC018.pdf.jpg2010Development of Partial Recon guration Controller Based Hardware PlatformVasava, Hirenkumar JesalBhai
08MEC015.pdf.jpg1-Jun-2010Modeling of Devices and Design of Circuits in Emerging Technologies - FinFET and OTFTPrajapati, Sanjay B.
08MEC014.pdf.jpg1-Jun-2010VLSI Design of Multi Output Voltage Regulator for Precision ApplicationsPatel, Shail K.
08MEC013.pdf.jpg1-Jun-2010Development and Verification of eDRAM behavioral modelsPatel, Ravikumar Vasudevbhai
08MEC012.pdf.jpg1-Jun-2010Characterization and Simulation of Second Generation Current ConveyorsPatel, Nileshkumar Kantilal
08MEC011.pdf.jpg1-Jun-2010Design and Analysis of Special Purpose Library ApproachPatel, Mitesh D.
08MEC010.pdf.jpg1-Jun-2010Development Study of Low Power High Speed Pipeline ADC in Deep Sub-micron TechnologyPatel, Manish Ishwarlal
08MEC008.pdf.jpg1-Jun-2010Optimizing ASIC Design Cycle TimeParmar, Niav Rameshbhai
08MEC007.pdf.jpg1-Jun-2010High Speed Low Jitter CMOS Clock Recovery Circuit Design using PLLJoshipura, Himali A.
08MEC006.pdf.jpg1-Jun-2010Automatic RTL generation for IO test SolutionJha, Saurabh
08MEC005.pdf.jpg1-Jun-2010Power verification of multi-power domain SOCJain, Abhishek
08MEC004.pdf.jpg1-Jun-2010Design & Simulation of Low Power High Speed CMOS Comparator in Deep Sub-micron TechnologyGandhi, Priyeshkumar Pratapbhai
08MEC003.pdf.jpg1-Jun-2010Design And Implementation Of Advanced ATPG Generating Compressible Test VectorDhare, Vaishali Hitesh
08MEC002.pdf.jpg1-Jun-2010DDR3 Crosstalk Cancellation CircuitDarji, Palak Dineshkumar
08MEC001.pdf.jpg1-Jun-2010Design, Analysis and Performance based Evaluation of DLL (Delay Locked Loop) in DSM TechnologyBhatt, Khyati Vinaychandra
07MEC020.pdf.jpg1-Jun-2009RTL Design of SpaceWire Protocol and AMBAInterface with LEON ProcessorPatel, Chintan
07MEC019.pdf.jpg1-Jun-2009Effect Of Scaling On Two Stage CMOS Operational Amplifier with Different Scaling LawsKhan, Umar Faruque
07MEC017.pdf.jpg1-Jun-2009Functional Verification of Capture Memory Subsystem at Module LevelHiren, Soria
Collection's Items (Sorted by Submit Date in Descending order): 321 to 340 of 423
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