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Browsing by Subject VLSI 2013

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Showing results 1 to 20 of 26  next >
PreviewIssue DateTitleAuthor(s)
13MECV03.pdf.jpg1-Jun-20156T-SRAM Cell Leakage Current Analysis & Self-Timing Circuit in the MemoryDave, Rachit
13MECV12.pdf.jpg1-Jun-2015Advance Automated Mechanism for Design, Compilation Verification and Validation Flows of Complex SoC DesignSharma, Ankur
13MECV15.pdf.jpg1-Jun-2015Analysis and Characterization of Low Power SRAM Memory CompilerPadaliya, Madhav
13MECV19.pdf.jpg1-Jun-2015Assertion based Verification of STBUSPatel, Vaishaliben
13MECV07.pdf.jpg1-Jun-2015Automation of Design Flow for Efficient Implementation of Latch Repeater Functional Blocks in Custom Design ApproachJirawala, Hardik
13MECV10.pdf.jpg1-Jun-2015Bit Cell Architecture For Embedded RomMasrani, Mansi
13MECV29.pdf.jpg1-Jun-2015Design & Characterization Of HD1P and HS1P Memory CompilerVaghasia, Prashantkumar
13MECV30.pdf.jpg1-Jun-2015Design and Characterization of High Speed 10T SRAM and Analysis of Memory CompilerShah, Hetansh
13MECV04.pdf.jpg1-Jun-2015Design And Characterization Of Memory Compiler And Enhancing Bitcell Performance With CNTFET For IOT ApplicationsDesai, Ishita
13MECV01.pdf.jpg1-Jun-2015Development & Verification of Standard CellBhavsar, Stefi
13MECV18.pdf.jpg1-Jun-2015Development And Valiation Of MBIST IPPatel, Vaibhav
13MECV31.pdf.jpg1-Jun-2015Development of Verification Environment for Behavioural Models of Analog Mixed Signal IP PLLNarang, Sahil
13MECV25.pdf.jpg1-Jun-2015Development of Verification IP for CAN Controller Using UVMShah, Ravin
13MECV11.pdf.jpg1-Jun-2015Front-end ASIC Design and Verification of Programmable and Precision Delay Timing Generator for CCD DetectorsMehta, Urvi
13MECV09.pdf.jpg1-Jun-2015Improving Efficiency and Effectiveness of IP and AArch32 Compliance Verification for v8-A CPUsShelat, Malav
13MECV20.pdf.jpg1-Jun-2015Margin Analysis of Memory Compiler for FinFET TechnologyPatel, Yogesh
13MECV17.pdf.jpg1-Jun-2015Modeling and Verification of Power Aware IO ModelsPatel, Ronak
13MECV16.pdf.jpg1-Jun-2015Performance Evaluation of SRAM Memory CompilerPatel, Anuj
13MECV28.pdf.jpg1-Jun-2015Physical View Generation and Validation of AMS IPS for the SOC EnablementThummar, Nileshkumar
13MECV05.pdf.jpg1-Jun-2015Semi-Custom Design Of Functional Blocks For Microprocessor Core With Timing, Power And Area OptimizationDesai, Parth
Showing results 1 to 20 of 26  next >