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Browsing by Subject VLSI 2016

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Showing results 1 to 20 of 27  next >
PreviewIssue DateTitleAuthor(s)
16MECV21.pdf.jpg1-Jun-2018Accelerating the Speed of Integrating IPs into SoCSapovadia, Dhara Mukeshbhai
16MECV22.pdf.jpg1-Jun-2018ASIC Design and Implementation of 4 Bit DACSayani, Mahapatra
16MECV04.pdf.jpg1-Jun-2018Automated Flow to fix Semi-custom Layout DRC in Ultra-Deep-Submicron TechnologyDave, Prachi
16MECV14.pdf.jpg1-Jun-2018Automatic Gain Control Amplifier for Biomedical ApplicationsModi, Bhavik
16MECV18.pdf.jpg1-Jun-2018Building Testchip for Enabling Faster SoC FlowRamanuj, Zeel Ghanshyambhai
16MECV11.pdf.jpg1-Jun-2018A Built-in Self-Test with Design for Testability Support for Embedded SRAMPannalal, Khatik Bhagvan
16MECV16.pdf.jpg1-Jun-2018Comparative Analysis and Evaluation Of Different CMOS TechnologiesGodre, Ocean
16MECV20.pdf.jpg1-Jun-2018Configurable RTL Generation Using AutomationRathore, Ritu
16MECV08.pdf.jpg1-Jun-2018Deploying and Improving Clock Domain Crossing Verification Techniques for SoCsJain, Sachin Sanjaykumar
16MECV02.pdf.jpg1-May-2018Design and Analysis of Power Efficient Dual Rail MethodologyBhatt, Kunjan Mukeshkumar
16MECV05.pdf.jpg1-Jun-2018Designing and Timing Analysis of Decision Feedback Equalizer in ReceiverFulvani, Anita
16MECV01.pdf.jpg1-May-2018How to Validate Machine Check Architecture Complete Flow at Full Chip LevelBaladaniya, Ketan
16MECV29.pdf.jpg1-Jun-2018Implementation Methodology Of On-chip High Speed InterconnectZala, Priyanka
16MECV26.pdf.jpg1-Jun-2018Implementation Of 32 Bit SPARC Processor On 180nm CMOS ProcessSingh, Aishwarya
16MECV24.pdf.jpg1-Jun-2018Implementation of Cortex A Series Processor On FinFET TechnologyChoudhary, Shivani
16MECV27.pdf.jpg1-Jun-2018Implementation of SPI/I2C/Mux-Demux logic for MULTIDUT Setup for SoC CharacterizationVaidya, Chirag Hemantkumar
16MECV19.pdf.jpg1-Jun-2018Improvements in PHY Low Power Analysis and VerificationKant, Ravindra
16MECV07.pdf.jpg1-Jun-2018Improvements in PHY Timing Analysis Methodology to Achieve High Turn Around Time and Better QualityGurjar, Kishan
16MECV10.pdf.jpg1-Jun-2018Memory BIST Implementation and ValidationJaviya, Mitali Harishbhai
16MECV15.pdf.jpg1-Jun-2018Modeling and Optimization Techniques for Yield-Aware SRAM Pre-Silicon TuningNagaria, Yash
Showing results 1 to 20 of 27  next >